- Union Minister of Electronics & IT addressed the Digital India RISC-V (DIR-V) Symposium organized by IIT Madras in Chennai.
- The one-day symposium, organized by IIT Madras, emphasized the government’s vision for DIR-V which currently aims to build a robust ecosystem for RISC-V with effective public-private partnerships and collaborations with premiere academic institutions.
Digital India RISC-V (DIR-V) Program
- The DIR-V Program is a forward-looking initiative that aims to uplift India’s semiconductor ecosystem.
- Its primary goal is to promote indigenous innovation in the field of microprocessors, laying the foundation for self-reliance.
- The program emphasizes three key principles: innovation, functionality, and performance, shaping its direction for the future.
RISC-V
- The term RISC stands for “reduced instruction set computer” which executes few computer instructions whereas ‘V’ stands for the 5th generation.
- It is an open-source hardware ISA (instruction set architecture) used for the development of custom processors targeting a variety of end applications.
- It also enables designers to create thousands of potential custom processors, facilitating faster time to market. The commonality of the processor IP also saves on software development time.
- RISC-V processors find versatile applications in wearables, IoT, smartphones, automotive, aerospace, and more, offering power efficiency, performance customization, and security. They excel in space-constrained designs and complex computational tasks.
- The RISC was invented by Prof. David Patterson around 1980 at the University of California, Berkeley.